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 EDGE749 Octal Pin Electronics Driver/Receiver
TEST AND MEASUREMENT PRODUCTS Description
The EDGE749 is an octal pin electronics driver and receiver combination fabricated in a high-performance CMOS process. It is designed for automatic test equipment and instrumentation where cost, functional density, and power are all at a premium. The EDGE749 incorporates eight channels of programmable drivers and receivers into one package. Each channel has per pin driver levels, receiver threshold, and tristate control. The 18V driver output and receiver input range allows the EDGE749 to interface directly between TTL, ECL, CMOS (3V, 5V, and 8V), very high voltage, and custom level circuitry. The EDGE749 is pin and functionally compatible with the Edge648 and Edge649.
Features
* * * * * * * * 20 MHz Operation 18 V DUT I/O Range Programmable Output Levels Programmable Input Thresholds Per Pin Flexibility High Integration Levels Low Power Dissipation Edge 648 and 649 Compatible
Applications
* * * * * * * Burn-In ATE Functional Board Testers In-Circuit Board Testers Combinational Board Testers Low Cost Chip Testers ASIC Verifiers VXI-Based Test Equipment
Functional Block Diagram
VHIGH
VLOW
8
8
8
DATA IN
8
DVR EN*
8
DUT
8
DATA OUT
+ -
8
THRESHOLD
Revision 3 / October 21, 2002
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EDGE749
TEST AND MEASUREMENT PRODUCTS PIN Description
Pin Name DATA IN (0:7) Pin Number 64, 65, 66, 67, 3, 4, 5, 6 56, 57, 58, 59, 11, 12, 13, 14 46, 43, 40, 37, 33, 30, 27, 24 60, 61, 62, 63, 7, 8, 9, 10 45, 44, 39, 38, 32, 31, 26, 25 47, 42, 41, 36, 34, 29, 28, 23 50, 51, 52, 53, 17, 18, 19, 20 21, 49 Description TTL compatible inputs that determine the high/low status of the DUT drivers. CMOS level outputs that indicate the status of the DUT receivers.
DATA OUT (0:7)
DUT (0:7)
Pin electronic inputs/outputs that receive/drive the device under test.
DVR EN (0:7)
TTl compatible inputs that control the high impedance state of the DUT drivers. Unbuffered analog inputs that set the voltage level of a logical 1 of the DUT drivers. Unbuffered analog inputs that set the voltage level of a logical 0 of the DUT drivers. Buffered analog input voltage that sets the threshold for the DUT comparators. Analog positive power supply.
VHIGH (0:7)
VLOW (0:7)
THRESHOLD (0:7)
VCC
VEE
22, 48
Analog negative power supply.
VDD
1, 15, 55
Digital power supply.
GND
2, 16, 54, 68
Device ground.
N/C
35
No connection.
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EDGE749
TEST AND MEASUREMENT PRODUCTS PIN Description (continued)
THRESHOLD3
THRESHOLD2
THRESHOLD1
THRESHOLD0
DATA OUT3
DATA OUT2
DATA OUT1
DATA OUT0
DVR EN*0
VHIGH0 45
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
DVR EN*1 DVR EN*2 DVR EN*3 DATA IN0 DATA IN1 DATA IN2 DATA IN3 GND VDD GND DATA IN4 DATA IN5 DATA IN6 DATA IN7 DVR EN*4 DVR EN*5 DVR EN*6
61 62 63 64 65 66 67 68 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 11
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
VHIGH1
VLOW0
DUT0
GND
VDD
VCC
VEE
DUT1 VLOW1 VLOW2 DUT2 VHIGH2 VHIGH3 DUT3 VLOW3 NC VLOW4 DUT4 VHIGH4 VHIGH5 DUT5 VLOW5 VLOW6 DUT6
DATA OUT4
DATA OUT5
DATA OUT6
DATA OUT7
THRESHOLD4
THRESHOLD5
THRESHOLD6
THRESHOLD7
VHIGH7
DVR EN*7
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VHIGH6
VLOW7
VEE
DUT7
GND
VDD
VCC
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EDGE749
TEST AND MEASUREMENT PRODUCTS Circuit Description
Driver Description
VHIGH VLOW
VHIGH and VLOW VHIGH and VLOW define the logical "1" and "0" levels of the DUT driver and can be adjusted anywhere over the range determined by VCC and VEE. Table 1 documents the relationship between the analog power to supplies (VCC and VEE), the driver range (VHIGH and VLOW), and the comparator threshold range (VTHRESHOLD). The VHIGH and VLOW inputs are unbuffered in that they also provide the driver output current (see Figure 3), so the source of VHIGH and VLOW must have ample current drive capability.
VHIGH
DATA IN DUT
DVR EN*
Figure 1. Driver Diagram
As shown in Figure 1, EDGE749 supports programmable high and low levels and tristate per channel. There are no shared lines between any drivers. The DVR EN* and DATA IN signals are TTL compatible inputs that control the driver (see Figure 2). With DVR EN* high, the DUT driver goes into a high impedance state. With DVR EN* low, DATA IN high forces the driver into a high state (DUT = VHIGH), and DATA IN low forces the driver low (DUT = VLOW).
DVR EN*
DUT
VLOW
DATA IN VHIGH VLOW
DUT
Figure 3. Simplified Model of the Unbuffered Output Stage
Figure 2. Driver Functionality
Drive Common Mode Range VEE <= DUT <= VCC
Receive Common Mode Range VEE <= DUT <= VCC
Threshold Range VEE + 3V <= THRESHOLD <= VOC - 3V
Table 1. Headroom vs. Power Supplies
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EDGE749
TEST AND MEASUREMENT PRODUCTS Circuit Description (continued)
Driver Output Protection In a functional testing environment, where a resistor is added in series with the driver output (to create a 50 output impedance), the EDGE749 can withstand a short to any legal DUT voltage for an indefinite amount of time. In a low impedance application with no additional output series resistance, care must be exercised and systems should be designed to check for this condition and tristate the driver if a short is detected.
Receiver Functionality EDGE749 supports programmable thresholds per channel. There are no shared lines between comparators. THRESHOLD is a high input impedance analog input which defines a logical "1" and "0" at the DUT (see Figure 4). If the DUT voltage is more positive than THRESHOLD, DATA OUT will be high. With DUT lower than THRESHOLD, DATA OUT will be low.
+ DATA OUT - DUT THRESHOLD
THRESHOLD DUT
DATA OUT Tpd
Figure 4. Receiver Functionality
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EDGE749
TEST AND MEASUREMENT PRODUCTS Application Information
Power Supplies The EDGE749 uses three power supplies: VDD, VCC and VEE. VDD is the digital supply for all of the data inputs and outputs. VCC and VEE are the analog power supplies for the EDGE749 drivers and comparators. In order to protect the EDGE749 and avoid damaging it, the following power supply requirements must be satisifed at all times: VEE GND VDD VCC VEE All Inputs VCC at all times capacitor in parallel with a .001 F chip capacitor. A VCC and VEE plane, or at least a solid power bus, is recommended for optimal performance.
VHIGH and VLOW Decoupling As the VHIGH and VLOW inputs are unbuffered and must supply the driver output current, decoupling capacitors for these inputs are recommended in proportion to the amount of output current the application requires.
Also,
The three-Schottky diode configuration shown in Figure 5, used on a once-per-board basis, insures power supply sequence and fault tolerance.
VCC
Expanding the Common Mode Range Although the EDGE749 can drive and receive 18 V swings, these 18 V signals can be adjusted over an 21 V range. By using programmable regulators V1 and V2 for the VCC and VEE supplies (feasible because these two analog power supplies do not supply driver output current), the EDGE749 I/O range can be optimized for a variety of applications (see Figure 6).
VDD 1N5820 or Equivalent
V1
VEE
VCC
Figure 5. Power Supply Protection Scheme
Power-On Sequencing 1. VCC (substrate) 2. VEE 3. VDD 4. Inputs Power Supplies Decoupling
Power-Off Sequencing 1. Inputs 2. VDD 3. VEE 4. VCC
Edge 749
VDD
V2
Figure 6.
VDD, which provides the digital power, should be decoupled to GND with a .1 F chip capacitor in parallel with a .001 F chip capacitor. The bypass capacitors should be as close to the device as possible. Power and ground planes are recommended to provide a low inductance return path. VCC and VEE, which power the DUT drivers and receivers, should also be decoupled to GND with a .1 F chip
Revision 3 / October 21, 2002 6
There are three rules which govern the supplies V1 and V2: 1) +10V < V1 < +18V 2) -3V < V2 < 0V 3) (V1 - V2) < +18V.
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EDGE749
TEST AND MEASUREMENT PRODUCTS Application Information (continued)
Window Comparator Certain applications require a dual threshold window comparator to distinguish between the DUT being high, low, or floating. To support this application, two EDGE749 channels can be combined to create one channel with a window comparator (see Figure 7). Notice that connecting two DUT pins ties together the positive inputs of both receivers. The result is a difference in polarity between the digital outputs reporting the high and low status of the DUT.
-
Trinary Driver At times, there is a need for a three-level driver. Typically, two levels are required for the standard digital "1" and "0" pattern generation. The third level provides a higher voltage to place the device under test (DUT) into a programming or test mode. By controlling the DATA IN and DVR EN* inputs, a trinary driver with tristate is realizable (see Figure 8).
Driver with Pull Up/Pull Down
High Threshold DUT HIGH
DUT + DUT LOW* - Low Threshold
Figure 7. EDGE749 as a Window Comparator
As the drivers are unbuffered, paralleling two drivers for one DUT node provides a means for adding pull up or pull down capability. By connecting the VHIGH and VLOW inputs of one driver through a resistor to a voltage, additional functionality that would normally require an external relay on the DUT transmission line to engage and disengage these functions is realizable. One common application for the pull up feature is testing open collector devices. The pull down satisfies open emitter DUTs (typically ECL). Either the pull up or down could be used to establish a default high impedance voltage on a bidirectional bus. Notice that in all applications, the resistors can be switched dynamically or statically.
Once two receivers are connected as window comparators, the two drivers also get connected in parallel. This dual driver configuration supports a multitude of applications that have traditionally been difficult to accommodate.
DATA IN A
DVR EN*A VHIGH B DUT
DATA IN B
DVR EN*B
Revision 3 / October 21, 2002
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VHIGH A
VLOW A
VHIGH B VHIGH A VLOW A
Figure 8. Trinary Driver
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EDGE749
TEST AND MEASUREMENT PRODUCTS Application Information (continued)
Also, either the pull up or pull down resistor could be used to terminate the transmission from the DUT to the pin electronics in an effort to minimize any reflections.
VHIGH A VLOW A
Two Logic Family Driver Many test systems support exactly two families of driver and receiver levels and select between family A and family B settings on a per-pin basis, typically using an analog multiplexer (See Figure 11). Common examples of these families are: Family A = TTL Family B = CMOS or Family A = TTL Family B = ECL The EDGE749 supports this system architecture with minimal hardware and the elimination of the per-pin analog multiplexer. The drive and receive levels need to be generated once per system, then distributed and buffered suitably.
DATA IN A
DUT
DVR EN*A VHIGH B VPULL UP DATA IN B VPULL DOWN VLOW B
DVR EN*B
Figure 9. Driver with Pull Up/Pull Down
Trinary Driver with Termination Other combinations are also possible. For example, two parallel drivers can be configured to implement one trinary driver with a pull down (or pull up) dynamic termination (see Figure 10).
VHIGH A VLOW A
Parametric Functions Two drivers in parallel also offer the possibility of connecting force and sense parametric circuitry to the DUT without adding additional circuitry to the controlled impedance DUT line. For example, Figure 12 shows the second driver being utilized to force a current and measure a voltage. Notice that the VHIGH and VLOW pins are used from different drivers to allow the force and sense functions to be active simultaneously.
DATA IN A
DVR EN*A VHIGH B VTERMINATION DATA IN B DUT
DVR EN*B
Figure 10. Trinary Driver with Termination
Revision 3 / October 21, 2002
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EDGE749
TEST AND MEASUREMENT PRODUCTS Application Information (continued)
CHANNEL 1 VHIGH A VHIGH B CHANNEL n
DVR EN*A
DVR EN*A
DVR DATA
DVR DATA
DUT0 DVR EN*B DVR EN*B
DUT0
VLOW B VLOW A
Figure 11. Family A/B Using Two Drivers Per Pin
Driver Output Impedance Ideally, a driver would have a constant output impedance over all ouptut conditions. However, the EDGE749 ouptut impedance does vary slightly over the common mode drive level and whether it is driving high or low. Figure 12 shows the variation in Rout.
EDGE749 Ron vs. Vout - VCC=+16.5V, VEE=-1.5V
9.5 9
Ron [Ohms]
8.5 8 7.5 7 6.5 6
-1.5 -0.5 9.5 10.5 11.1 12.5 13.5 14.5 15.5 16.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5
R_VLO R_VHI
Vout [V]
Figure 12. ROUT vs. DOUT
EDGE749 Leakage in HIZ - VCC=+16.5V, VEE=-1.5V
10
High Impedance Leakage The EDGE749 is designed to be extremely low leakage (see Figure 13.) In a low performance application, where the output capacitance is not a concern, the low leakage may allow the elimination of an isolation relay.
Leakage Current [nA]
8 6 4 2 0 -2 -4 -6 -8 -10 VLO=0, VHI=+8
-3
-2
-1
10
11
12
13
14
15
16
Dout [Volts]
Figure 13. High Impedance Leakage
Revision 3 / October 21, 2002
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17
0
1
2
3
4
5
6
7
8
9
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EDGE749
TEST AND MEASUREMENT PRODUCTS Package Information
68 Pin PLCC Package JA = 42 to 48C / W
PIN Descriptions
0.990 SQ [25.146]
0.048 [1.219]
See Detail A
0.953 SQ [24.206] 0.045 SQ [1.143]
0.800 REF [20.32]
0.910 [23.114]
0.175 [4.445]
0.113 [2.87]
0.016 [0.406]
0.029 [0.736]
0.029 [0.736]
0.016 [0.406]
0.020 [0.508] MIN
; ; ;
0.065 [1.651]
0.030 [0.762]
Notes: (unless otherwise specified) 1. Dimensions are in inches [millimeters]. 2. Tolerances are: .XXX 0.005 [0.127]. 3. PLCC packages are intended for surface mounting on solder lands on 0.050 [1.27] centers.
Revision 3 / October 21, 2002
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EDGE749
TEST AND MEASUREMENT PRODUCTS Recommended Operating Conditions
Parameter Digital Power Supply Analog Positive Power Supply Analog Negative Power Supply Total Analog Power Supply Driver High Output Voltage Driver Low Output Voltage Total Driver Output Swing Receiver Threshold Voltage Ambient Operating Temperature Symbol VDD VCC VEE VCC - VEE VHIGH VLOW VHIGH - VLOW THRESHOLD TA TJ Min 4.5 10 -3 10 VEE VEE -18 VEE + 3 0 0 Typ 5 15 -2 Max 5. 5 18 0 18 VCC VCC 18 VCC - 3 +70 +125 Units V V V V V V V V
oC oC
Absolute Maximum Ratings
Parameter Total Analog Power Supply Positive Analog Power Supply Negative Analog Power Supply Driver High Output Voltage Driver Low Output Voltage Driver Output Swing Receiver Threshold Voltage Digital Inputs Digital Power Supply Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature Symbol VCC - VEE VCC VEE VHIGH VLOW VHIGH - VLOW THRESHOLD DATA IN DVR EN* VDD TA TS TJ TSOL -.5 -5 VEE - .5 VEE - .5 -18.5 VEE - .5 GND - .5 0 -55 -65 Min Typ Max 19 19 0.5 VCC + .5 VCC + .5 18.5 VCC + .5 VDD + .5 6.5 +125 +150 +150 260 Units V V V V V V V V V
oC oC oC oC
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these, or any other conditions beyond those listed, is not implied. Exposure to absolute maximum conditions for extended periods may affect device reliability.
Revision 3 / October 21, 2002 11 www .semtech.com
EDGE749
TEST AND MEASUREMENT PRODUCTS DC Characteristics
Parameter Driver/Receiver Characteristics Output Voltage Swing DC Driver Output Current (Note 1) Output Impedance (Note 2) DUT Pin Capacitance DUT Output voltage Receiver Threshold Level Threshold Bias Current DUT Leakage Input Current Receiver Offset Voltage (Note 3) Quiescent Power Supply Current Positive Power Supply Negative Power Supply Digital Power Supply Digital Inputs DATA IN (0:7), DVR EN* (0:7) Input High Voltage Input Low Voltage Input Current Input Capacitance Digital Outputs DATA OUT (0:7) Output Voltage High (Note 4) Output Voltage Low (Note 5) DC Output current VOH VOL IOUT VDD - .4 -0.4 0 VDD + .4 0. 4 4 V V mA VIHM IN VILM A X IIN CIN 5 2.0 0 VDD 0.8 1.0 V V A pF IB I A S VOS ICC IEE IDD -200 60 -40 5 V H I G H - VL O W IO U T RO U T CO U T DUT<0:7> VT H R E S H O L D VEE VEE + 3 0 .001 -18 -125 4 8 20 VCC VCC - 3 1.0 1.0 200 80 15 18 +125 12 V mA pF V V A A mV mA mA mA Symbol Min Typ Max Units
-60
Note 1 : Note 2 : Note 3 : Note 4: Note 5:
Output current specification is per individual driver. Tested for driving a high state and low state at +18V, +6V, and 0V. Measured at THRESHOLD = +1.5V. Output current of -4 mA. Output current of 4 mA.
Revision 3 / October 21, 2002
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EDGE749
TEST AND MEASUREMENT PRODUCTS AC Characteristics
Parameter Propagation Delay DATA IN <0:7> to DUT <0:7> DUT <0:7> to DATA OUT <0:7> Active to HiZ HiZ to Active DUT Output Rise/Fall Times (Note 1) 1V Swing (20% - 80%) 3V Swing (10% - 90%) 5V Swing (10% - 90%) 8V Swing (10% - 90%) 10V Swing (10% - 90%) Digital Outputs (DATA OUT <0:7>) DATA OUT Rise Time (10% - 90%) DATA OUT Fall Time (10% - 90%) Minimum Pulse Width Driver Output Comparator Output Maximum Operating Frequency Fmax Symbol Min Typ Max Units
T1 T2 T3 T4
20 10 20 20
29 21 32 28
38 30 40 35
ns ns ns ns
1.0 1.5 1.5 1.5 1.5
ns ns ns ns ns
TR TF
2.5 2.5
ns ns
25 20 15
20 15 20
ns ns MHz
Note 1:
Into 18 inches of 50 transmission line terminated with 1K and 5 pF with the proper series termination resistor.
T1 DATA IN
T2
DUT
DATA OUT
DVR EN*
DUT T3
HiZ T4
Revision 3 / October 21, 2002
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EDGE749
TEST AND MEASUREMENT PRODUCTS Ordering Information
Model Number E749BPJ
Package 68-Pin PLCC
EVM749EVM
EDGE749 Evaluation Module
Contact Infor mation
Semtech Corporation Test and Measurement Division 10021 Willow Creek Rd., San Diego, CA 92131 Phone: (858)695-1808 FAX (858)695-2633
Revision 3 / October 21, 2002 14 www .semtech.com
EDGE749
TEST AND MEASUREMENT PRODUCTS Revision History
Current Revision Date: October 21, 2002 Previous Revision Date: June 11, 2002
Page # 6
Section Name Power Supplies
Previous Revision
Current Revision Para 1 rewritten Para 2 deleted Power On and Off Sequencing added
Current Revision Date: June 11, 2002 Previous Revision Date: June 23, 1998
Page # 2 Section Name Pin Descriptions Previous Revision VLOW Current Revision Change Pin #44 to Pin #47
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